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decreases until it is comparable to the loss resistance R in the coil winding. In either case, the situation can be schematically represented by an inductance in series with a resistance (Fig. 13-10). If you know the values of XL and R, you can find the angle of lag, also called the RL phase angle, by plotting the point R + jXL on the RL plane, drawing the vector from the origin out to that point, and then measuring the angle of the vector, counterclockwise from the resistance axis. You can use a protractor to measure this angle, or you can compute its value using trigonometry. Actually, you don t have to know the actual values of XL and R in order to find the angle of lag. All you need to know is their ratio. For example, if XL = 5 and R = 3 , you get the same RL phase angle that you get if XL = 50 and R = 30 , or if XL = 20 and R = 12 . The angle of lag is the same for any values of XL and R in the ratio 5:3.

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If a coil has an inductive reactance of 100 at a frequency of 5.00 MHz, what is its inductance In this case, you need to plug numbers into the formula and solve for the unknown L. Start out with the equation 100 6.28 5. 00 L 31.4 L. Then, recall that because the frequency is in megahertz, or millions of hertz, the inductance will come out in microhenrys, or millionths of a henry. You can divide both sides of the equation by 31.4, getting L 100/31.4 3.18 H.

Before we do, however, let s spend a few minutes discussing the hierarchy of switching. Part of this is a review of prior material. Most of it, though, is preparation for our discussion of Frame Relay and ATM, the so-called fast-packet switching technologies.

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Inductive reactance can be plotted along a half line, just as can resistance. In a circuit containing both resistance and inductance, the characteristics become two-dimensional. You can orient the resistance and reactance half lines perpendicular to each other to make a quarter-plane coordinate system, as shown in Fig. 13-5. Resistance is usually plotted horizontally, and inductive reactance is plotted vertically, going upwards. In this scheme, RL combinations form impedances. You ll learn all about this in chapter 15. Each point on the RL plane corresponds to one unique impedance value. Conversely, each RL impedance value corresponds to one unique point on the plane. For reasons made clear in chapter 15, impedances on the RL plane are written in the form R jXL, where R is the resistance and XL is the inductive reactance. If you have a pure resistance, say R 5 , then the complex impedance is 5 j0, and is at the point (5,0) on the RL plane. If you have a pure inductive reactance, such as

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Pure Resistance As the resistance in an RL circuit becomes large with respect to the inductive reactance, the angle of lag gets small. The same thing happens if the inductive reactance gets small compared with the resistance. When R is many times greater than XL, the vector in the RL plane lies almost on the R axis, going east (to the right). The RL phase angle in this case is close to 0 . The current is nearly in phase with the voltage. In a pure resistance, with no inductance at all, the current is precisely in phase with the voltage (Fig. 13-11). A pure resistance doesn t store and release energy as an inductive circuit does, so there is no sluggishness in it.

The switching hierarchy, shown in Figure 6-1, has two major subheadings: circuit switching and store-and-forward switching. Circuit switching is something of an evolutionary dead end in that it will not become something else. The only evolution for circuit switching is an evolution toward packet switching at this point. Packet switching evolved as one of the two descendents of store-andforward technology. Message switching, the alternative and another evolutionary dead end, is inefficient and not suited to the bursty nature of most data services today. Packet switching continues to hold sway and, because of its many forms, is a valid solution for most data applications. Packet switching has three major forms, two of which were discussed in earlier chapters. Connection-oriented packet switching manifests itself as a virtual circuit service that offers the appearance and behavior of a dedicated circuit when, in fact, it is a switched service. It creates a path through the network that all packets from the same source (and going to the same destination) follow, the result of which is constant transmission latency for all packets in the flow. Both

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